Silicon Labs /EFR32MG21B010F768IM32 /LDMA_S /CH1_CFG

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Interpret as CH1_CFG

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ONE)ARBSLOTS 0 (POSITIVE)SRCINCSIGN 0 (POSITIVE)DSTINCSIGN

DSTINCSIGN=POSITIVE, SRCINCSIGN=POSITIVE, ARBSLOTS=ONE

Description

No Description

Fields

ARBSLOTS

Arbitration Slot Number Select

0 (ONE): One arbitration slot selected

1 (TWO): Two arbitration slots selected

2 (FOUR): Four arbitration slots selected

3 (EIGHT): Eight arbitration slots selected

SRCINCSIGN

Source Address Increment Sign

0 (POSITIVE): Increment source address

1 (NEGATIVE): Decrement source address

DSTINCSIGN

Destination Address Increment Sign

0 (POSITIVE): Increment destination address

1 (NEGATIVE): Decrement destination address

Links

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